Prof. (Dr.) Avireni Srinivasulu
Dean (Academics and R&D)
Faculty of Engineering
B.Tech, M.E, M.S, Ph.D (Birla Inst. of Tech. - Mesra)
VLSI Design, Analog ASIC, Embedded Systems, Digital Systems and Microelectronics Engineering
Google Scholar Link
Patent No. 1237/CHE/2014: Avireni Srinivasulu, P. V. Lakshmi and M. Sarada, “A novel high speed, low power three input static CMOS Exclusive-OR logic gate circuit”, 10th Mar 2014, India.
Patent No. OSIM: A00813/17.10.2018: C. Ravariu and Avireni Srinivasulu, “Technology for integrated circuit design with low number of NOI-MOS hybrid devices”, 17th Oct 2018, ROMANIA- E.U. (Application Awaiting Examination).
Patent Filed Application No. 201911001847: M. K. Chaithanya, and Avireni Srinivasulu,“Smart Bin System”, 16th Jan 2019, INDIA.